Skip to content
applystead.Log inGet started

Applystead salaries · 14 posted pay ranges

ASIC Design Verification Engineer salaries in San Jose, CA

Pay ranges employers published in 14 open job postings for ASIC Design Verification Engineer roles in San Jose, CA, updated Nov 14, 2026.

Continue with GoogleGet matched to ASIC Design Verification Engineer jobs in San Jose, CA

Posted base pay ranges from job listings, not total compensation. Figures are in USD. How these figures are made

Newest ASIC Design Verification Engineer postings in San Jose, CA

  1. ASIC Design Verification EngineerCisco · San Jose, CA · $155K–$223K/yr · Posted Nov 5, 2026
  2. Sr. ASIC Design Verification EngineerCisco · San Jose, CA · $168K–$245K/yr · Posted Nov 4, 2026
  3. ASIC Design Verification Engineer, Technical LeaderCisco · San Jose, CA · $187K–$268K/yr · Posted Nov 3, 2026
  4. ASIC Design Verification Engineer I (Full Time) - United StatesCisco · San Jose, CA · $108K–$157K/yr · Posted Oct 27, 2026
  5. Senior ASIC Design Verification EngineerCisco · San Jose, CA · $168K–$245K/yr · Posted Oct 21, 2026
  6. Want Applystead to find more jobs like these? Start free trial →

ASIC Design Verification Engineer pay in other places

  1. United States$213K median, $169K–$238K typical, 81 postingsUnited States: middle half $169K–$238K, median $213K
  2. California$207K median, $168K–$238K typical, 40 postingsCalifornia: middle half $168K–$238K, median $207K
  3. Santa Clara, CA$168K median, $168K–$238K typical, 10 postingsSanta Clara, CA: middle half $168K–$238K, median $168K
  4. CanadaCA$155K median, CA$155K–CA$155K typical, 9 postings
  5. Ontario, CanadaCA$155K median, CA$155K–CA$155K typical, 7 postings
  6. Markham, ON, CanadaCA$155K median, CA$155K–CA$155K typical, 7 postings
  7. Los Angeles, CA$277K median, $277K–$323K typical, 5 postingsLos Angeles, CA: middle half $277K–$323K, median $277K
  8. Texas$275K median, $167K–$275K typical, 5 postingsTexas: middle half $167K–$275K, median $275K

All ASIC Design Verification Engineer salaries

Questions and answers

How much does a ASIC Design Verification Engineer make in San Jose, CA?

The median posted base pay for ASIC Design Verification Engineer jobs in San Jose, CA is $203K a year, from 14 job postings with pay at 2 companies.

What is the typical ASIC Design Verification Engineer pay range in San Jose, CA?

The middle half of postings list $189K–$207K. The top 10% list $228K a year or more, and the lowest 10% $186K or less.

How does San Jose, CA pay compare with all ASIC Design Verification Engineer jobs?

The median here is $203K, against $213K across all 90 postings for the role.

How many ASIC Design Verification Engineer jobs in San Jose, CA list pay?

14 open postings at 2 companies list a pay range; figures use postings with at least 3 per group.

Free tools and comparisons

LoopCV vs JobCopilotRezi vs TealInterview reschedule email templateJob application tracker templateJob description keyword extractorJob offer acceptance email template

Start free trial