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APPLYSTEAD SALARIES · 5 POSTED PAY RANGES

FPGA/ASIC Design Engineer salaries

Pay ranges employers published in 5 open job postings for FPGA/ASIC Design Engineer roles at 2 companies, updated Oct 16, 2026.

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Posted base pay ranges from job listings, not total compensation. Figures are in USD. How these figures are made

Pay distribution

FPGA/ASIC Design Engineer: postings by posted pay5 postings by the midpoint of their pay range, in 12 bands from $140K to $200K. Median $200K; middle half $145K–$200K.Median $200K$140K$200K

Postings per pay band: $140K–$145K: 1; $145K–$150K: 1; $150K–$155K: 0; $155K–$160K: 0; $160K–$165K: 0; $165K–$170K: 0; $170K–$175K: 0; $175K–$180K: 0; $180K–$185K: 0; $185K–$190K: 0; $190K–$195K: 0; $195K–$200K: 3.

Pay by level

  1. Principal$200K median · $200K–$200K typical · 3 postingsPrincipal: middle half $200K–$200K, median $200K

Companies hiring

  1. Rolls Royce$200K median · $200K–$200K typical · 3 postingsRolls Royce: middle half $200K–$200K, median $200K
  2. SpaceX2 postings · too few to show pay

Top-paying companies

  1. Rolls Royce · $200K median · 3 postings

By location

  1. United States$200K median · $145K–$200K typical · 5 postingsUnited States: middle half $145K–$200K, median $200K
  2. Virginia$200K median · $200K–$200K typical · 3 postingsVirginia: middle half $200K–$200K, median $200K
  3. Reston, VA$200K median · $200K–$200K typical · 3 postingsReston, VA: middle half $200K–$200K, median $200K
  4. Remote$200K median · $200K–$200K typical · 3 postingsRemote: middle half $200K–$200K, median $200K

Remote vs on-site

Remote: $200K median, $200K–$200K typical, from 3 postings. On-site: too few postings list pay to show a figure.

Newest FPGA/ASIC Design Engineer postings

  1. FPGA/ASIC Design Engineer (Silicon Engineering)SpaceX · Irvine, CA · $125K–$160K/yr · Posted Sep 30, 2026Apply
  2. FPGA/ASIC Design Engineer (Silicon Engineering)SpaceX · Redmond, WA · $125K–$165K/yr · Posted Sep 30, 2026Apply
  3. Principal Engineer - FPGA/ASIC DesignRolls Royce · Remote · $152K–$247K/yr · Posted Aug 25, 2026
  4. Principal Engineer - FPGA/ASIC DesignRolls Royce · Remote · $152K–$247K/yr · Posted Aug 25, 2026
  5. Principal Engineer - FPGA/ASIC DesignRolls Royce · Remote · $152K–$247K/yr · Posted Aug 25, 2026
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Questions and answers

How much does a FPGA/ASIC Design Engineer make?

The median posted base pay for FPGA/ASIC Design Engineer jobs is $200K a year, from 5 job postings with pay at 2 companies.

What is the typical FPGA/ASIC Design Engineer pay range?

The middle half of postings list $145K–$200K. The top 10% list $200K a year or more, and the lowest 10% $143K or less.

Which companies pay the most for FPGA/ASIC Design Engineer jobs?

By median posted pay: Rolls Royce ($200K).

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