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APPLYSTEAD SALARIES · 3 POSTED PAY RANGES

Rolls Royce FPGA/ASIC Design Engineer salaries

Pay ranges Rolls Royce published in 3 open job postings for FPGA/ASIC Design Engineer roles, updated Oct 14, 2026.

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Posted base pay ranges from job listings, not total compensation. Figures are in USD. How these figures are made

Rolls Royce’s FPGA/ASIC Design Engineer titles

  1. Principal Engineer, FPGA/ASIC Design (Principal)$200K median · $200K–$200K typical · 3 postingsPrincipal Engineer, FPGA/ASIC Design (Principal): middle half $200K–$200K, median $200K

Pay by level

  1. Principal$200K median · $200K–$200K typical · 3 postingsPrincipal: middle half $200K–$200K, median $200K

Locations

  1. United States · $200K median · 3 postings
  2. Virginia · $200K median · 3 postings
  3. Reston, VA · $200K median · 3 postings

Newest Rolls Royce FPGA/ASIC Design Engineer postings

  1. Principal Engineer - FPGA/ASIC DesignRolls Royce · Remote · $152K–$247K/yr · Posted Aug 25, 2026
  2. Principal Engineer - FPGA/ASIC DesignRolls Royce · Remote · $152K–$247K/yr · Posted Aug 25, 2026
  3. Principal Engineer - FPGA/ASIC DesignRolls Royce · Remote · $152K–$247K/yr · Posted Aug 25, 2026
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