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FPGA/ASIC Verification Engineer salaries

Pay ranges employers published in 5 open job postings for FPGA/ASIC Verification Engineer roles at 2 companies, updated Oct 28, 2026.

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Posted base pay ranges from job listings, not total compensation. Figures are in USD. How these figures are made

Pay distribution

FPGA/ASIC Verification Engineer: postings by posted pay5 postings by the midpoint of their pay range, in 13 bands from $155K to $220K. Median $156K; middle half $156K–$218K.Median $156K$155K$220K

Postings per pay band: $155K–$160K: 3; $160K–$165K: 0; $165K–$170K: 0; $170K–$175K: 0; $175K–$180K: 0; $180K–$185K: 0; $185K–$190K: 0; $190K–$195K: 0; $195K–$200K: 0; $200K–$205K: 0; $205K–$210K: 0; $210K–$215K: 0; $215K–$220K: 2.

Pay by level

  1. Principal$156K median · $156K–$156K typical · 3 postingsPrincipal: middle half $156K–$156K, median $156K

Companies hiring

  1. RTX$156K median · $156K–$156K typical · 3 postingsRTX: middle half $156K–$156K, median $156K
  2. Stage 4 Solutions2 postings · too few to show pay

Top-paying companies

  1. RTX · $156K median · 3 postings

By location

  1. United States$156K median · $156K–$218K typical · 5 postingsUnited States: middle half $156K–$218K, median $156K
  2. Indiana$156K median · $156K–$156K typical · 3 postingsIndiana: middle half $156K–$156K, median $156K
  3. Fort Wayne, IN$156K median · $156K–$156K typical · 3 postingsFort Wayne, IN: middle half $156K–$156K, median $156K

Remote vs on-site

Remote: too few postings list pay to show a figure. On-site: $156K median, $156K–$156K typical, from 3 postings.

Newest FPGA/ASIC Verification Engineer postings

  1. FPGA/ASIC Verification Engineer– (Remote OR Hybrid – Sunnyvale, CA, Denver, CO, Houston, TX)Stage 4 Solutions · Remote · $100.00–$110.00/hr · Posted Oct 25, 2026
  2. FPGA/ASIC Verification Engineer– (Remote OR Hybrid – Sunnyvale, CA, Denver, CO, Houston, TX)Stage 4 Solutions · Remote · $100.00–$110.00/hr · Posted Oct 16, 2026
  3. Principal FPGA/ASIC Verification Engineer (Onsite)- Active SecretRTX · Fort Wayne, IN · $108K–$205K/yr · Posted Oct 12, 2026
  4. Principal FPGA/ASIC Verification Engineer (Onsite)RTX · Fort Wayne, IN · $108K–$205K/yr · Posted Aug 26, 2026
  5. Principal FPGA/ASIC Verification Engineer (Onsite)RTX · Fort Wayne, IN · $108K–$205K/yr · Posted Aug 26, 2026
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Questions and answers

How much does a FPGA/ASIC Verification Engineer make?

The median posted base pay for FPGA/ASIC Verification Engineer jobs is $156K a year, from 5 job postings with pay at 2 companies.

What is the typical FPGA/ASIC Verification Engineer pay range?

The middle half of postings list $156K–$218K. The top 10% list $218K a year or more, and the lowest 10% $156K or less.

Which companies pay the most for FPGA/ASIC Verification Engineer jobs?

By median posted pay: RTX ($156K).

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