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APPLYSTEAD SALARIES · 7 POSTED PAY RANGES

ASIC / FPGA Digital Design Engineer salaries

Pay ranges employers published in 7 open job postings for ASIC / FPGA Digital Design Engineer roles at 1 company, updated Oct 10, 2026.

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Posted base pay ranges from job listings, not total compensation. Figures are in USD. How these figures are made

Pay distribution

ASIC / FPGA Digital Design Engineer: postings by posted pay7 postings by the midpoint of their pay range, in 12 bands from $115K to $175K. Median $172K; middle half $172K–$172K.Median $172K$115K$175K

Postings per pay band: $115K–$120K: 1; $120K–$125K: 0; $125K–$130K: 0; $130K–$135K: 0; $135K–$140K: 0; $140K–$145K: 0; $145K–$150K: 0; $150K–$155K: 0; $155K–$160K: 0; $160K–$165K: 0; $165K–$170K: 0; $170K–$175K: 6.

Pay by level

  1. Senior$172K median · $172K–$172K typical · 6 postingsSenior: middle half $172K–$172K, median $172K

Companies hiring

  1. Boeing$172K median · $172K–$172K typical · 7 postingsBoeing: middle half $172K–$172K, median $172K

Top-paying companies

  1. Boeing · $172K median · 7 postings

By location

  1. United States$172K median · $172K–$172K typical · 7 postingsUnited States: middle half $172K–$172K, median $172K

Remote vs on-site

Remote: too few postings list pay to show a figure. On-site: $172K median, $172K–$172K typical, from 6 postings.

Newest ASIC / FPGA Digital Design Engineer postings

  1. ASIC / FPGA Digital Design Engineer – (Lead or Senior)Boeing · United States · $146K–$198K/yr · Posted Sep 26, 2026
  2. ASIC / FPGA Digital Design Engineer – (Associate or Experienced)Boeing · El Segundo, CA · $98.6K–$133K/yr · Posted Sep 26, 2026
  3. ASIC / FPGA Digital Design Engineer – (Lead or Senior)Boeing · United States · $146K–$198K/yr · Posted Sep 26, 2026
  4. ASIC / FPGA Digital Design Engineer – (Lead or Senior)Boeing · United States · $146K–$198K/yr · Posted Aug 26, 2026
  5. ASIC / FPGA Digital Design Engineer – (Lead or Senior)Boeing · United States · $146K–$198K/yr · Posted Aug 26, 2026
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Questions and answers

How much does a ASIC / FPGA Digital Design Engineer make?

The median posted base pay for ASIC / FPGA Digital Design Engineer jobs is $172K a year, from 7 job postings with pay at 1 company.

What is the typical ASIC / FPGA Digital Design Engineer pay range?

The middle half of postings list $172K–$172K. The top 10% list $172K a year or more, and the lowest 10% $116K or less.

Which companies pay the most for ASIC / FPGA Digital Design Engineer jobs?

By median posted pay: Boeing ($172K).

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