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Applystead salaries · 16 posted pay ranges

VMware Design Verification Engineer salaries

Pay ranges VMware published in 16 open job postings for Design Verification Engineer roles, updated Nov 14, 2026.

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Posted base pay ranges from job listings, not total compensation. Figures are in USD. How these figures are made

VMware’s Design Verification Engineer titles

  1. Design Verification Engineer (Mid level)$187K median, $156K–$187K typical, 16 postingsDesign Verification Engineer (Mid level): middle half $156K–$187K, median $187K

Pay by level

  1. Mid level$187K median, $156K–$187K typical, 16 postingsMid level: middle half $156K–$187K, median $187K

Locations

  1. United States · $187K median, 16 postings
  2. California · $187K median, 11 postings
  3. San Jose, CA · $187K median, 11 postings
  4. Colorado · 2 postings
  5. Broomfield, CO · 2 postings

Newest VMware Design Verification Engineer postings

  1. Design Verification EngineerVMware · San Jose, CA · $144K–$230K/yr · Posted Nov 14, 2026
  2. Design Verification EngineerVMware · San Jose, CA · $144K–$230K/yr · Posted Nov 13, 2026
  3. Design Verification EngineerVMware · San Jose, CA · $120K–$192K/yr · Posted Oct 23, 2026
  4. Design Verification EngineerVMware · San Jose, CA · $144K–$230K/yr · Posted Oct 21, 2026
  5. Design Verification EngineerVMware · United States · $120K–$192K/yr · Posted Aug 26, 2026
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