APPLYSTEAD SALARIES · 7 POSTED PAY RANGES
FPGA / RTL Design Engineer salaries
Pay ranges employers published in 7 open job postings for FPGA / RTL Design Engineer roles at 1 company, updated Oct 11, 2026.
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- Median base pay$200,000a year
- Typical range$160,000–$200,000Middle half of postings
- Top 10%$215,000and above
- Postings7with a pay range
Posted base pay ranges from job listings, not total compensation. Figures are in USD. How these figures are made
Pay distribution
Postings per pay band: $160K–$165K: 2; $165K–$170K: 0; $170K–$175K: 0; $175K–$180K: 1; $180K–$185K: 0; $185K–$190K: 0; $190K–$195K: 0; $195K–$200K: 0; $200K–$205K: 3; $205K–$210K: 0; $210K–$215K: 1.
Pay by level
Companies hiring
Top-paying companies
- Motorola Solutions · $200K median · 7 postings
By location
Remote vs on-site
Remote: $200K median, $160K–$200K typical, from 7 postings. On-site: too few postings list pay to show a figure.
By years of experience
Newest FPGA / RTL Design Engineer postings
- Senior FPGA / RTL Design Engineer - Signal ProcessingMotorola Solutions · Remote · $155K–$195K/yr · Posted Oct 8, 2026
- Principal FPGA / RTL Design Engineer – Signal ProcessingMotorola Solutions · Remote · $195K–$235K/yr · Posted Oct 8, 2026
- Principal FPGA / RTL Design Engineer - Signal ProcessingMotorola Solutions · Remote · $175K–$225K/yr · Posted Aug 26, 2026
- Senior FPGA / RTL Design Engineer - Signal ProcessingMotorola Solutions · Remote · $125K–$195K/yr · Posted Aug 26, 2026
- Principal FPGA / RTL Design Engineer - Signal ProcessingMotorola Solutions · Remote · $175K–$225K/yr · Posted Aug 26, 2026
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Questions and answers
How much does a FPGA / RTL Design Engineer make?
The median posted base pay for FPGA / RTL Design Engineer jobs is $200K a year, from 7 job postings with pay at 1 company.
What is the typical FPGA / RTL Design Engineer pay range?
The middle half of postings list $160K–$200K. The top 10% list $215K a year or more, and the lowest 10% $160K or less.
Which companies pay the most for FPGA / RTL Design Engineer jobs?
By median posted pay: Motorola Solutions ($200K).
How does FPGA / RTL Design Engineer pay change with level?
Median posted pay by level read from job titles: Senior $160K, Principal $200K.
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