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APPLYSTEAD SALARIES · 9 POSTED PAY RANGES

ASIC/FPGA Design and Verification Engineer salaries

Pay ranges employers published in 9 open job postings for ASIC/FPGA Design and Verification Engineer roles at 1 company, updated Oct 4, 2026.

Posted base pay ranges from job listings, not total compensation. Figures are in USD. How these figures are made

Pay distribution

ASIC/FPGA Design and Verification Engineer: postings by posted pay9 postings by the midpoint of their pay range, in 7 bands from $160K to $195K. Median $161K; middle half $161K–$194K.Median $161K$160K$195K

Postings per pay band: $160K–$165K: 5; $165K–$170K: 0; $170K–$175K: 0; $175K–$180K: 0; $180K–$185K: 0; $185K–$190K: 0; $190K–$195K: 4.

Pay by level

  1. Principal$161K median · $161K–$194K typical · 9 postingsPrincipal: middle half $161K–$194K, median $161K

Companies hiring

  1. Boeing$161K median · $161K–$194K typical · 9 postingsBoeing: middle half $161K–$194K, median $161K

Top-paying companies

  1. Boeing · $161K median · 9 postings

By location

  1. United States$161K median · $161K–$194K typical · 9 postingsUnited States: middle half $161K–$194K, median $161K
  2. New Mexico$161K median · $161K–$161K typical · 4 postingsNew Mexico: middle half $161K–$161K, median $161K
  3. Albuquerque, NM$161K median · $161K–$161K typical · 4 postingsAlbuquerque, NM: middle half $161K–$161K, median $161K

Remote vs on-site

Remote: too few postings list pay to show a figure. On-site: $161K median, $161K–$194K typical, from 5 postings.

By years of experience

  1. 8+ years$194K median · $161K–$194K typical · 6 postings8+ years: middle half $161K–$194K, median $194K

Newest ASIC/FPGA Design and Verification Engineer postings

  1. ASIC/FPGA Design and Verification Engineer – Space Electronics – (Senior or Principal) - MTVBoeing · Mountain View, CA · $165K–$223K/yr · Posted Sep 27, 2026ApplyView posting
  2. ASIC/FPGA Design and Verification Engineer – Space Electronics – (Senior or Principal) - MTVBoeing · Mountain View, CA · $165K–$223K/yr · Posted Sep 27, 2026ApplyView posting
  3. ASIC/FPGA Design and Verification Engineer – Space Electronics – (Senior or Principal) - MTVBoeing · United States · $165K–$223K/yr · Posted Sep 26, 2026ApplyView posting
  4. ASIC/FPGA Design and Verification Engineer – Space Electronics – (Senior or Principal) - MTVBoeing · United States · $165K–$223K/yr · Posted Sep 26, 2026ApplyView posting
  5. ASIC/FPGA Design and Verification Engineer - (Lead, Senior, or Principal)Boeing · Albuquerque, NM · $137K–$185K/yr · Posted Aug 26, 2026ApplyView posting
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Questions and answers

How much does a ASIC/FPGA Design and Verification Engineer make?

The median posted base pay for ASIC/FPGA Design and Verification Engineer jobs is $161K a year, from 9 job postings with pay at 1 company.

What is the typical ASIC/FPGA Design and Verification Engineer pay range?

The middle half of postings list $161K–$194K. The top 10% list $194K a year or more, and the lowest 10% $161K or less.

Which companies pay the most for ASIC/FPGA Design and Verification Engineer jobs?

By median posted pay: Boeing ($161K).

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