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APPLYSTEAD SALARIES · 9 POSTED PAY RANGES

ASIC/FPGA Design and Verification Engineer salaries in United States

Pay ranges employers published in 9 open job postings for ASIC/FPGA Design and Verification Engineer roles in United States, updated Oct 4, 2026.

Posted base pay ranges from job listings, not total compensation. Figures are in USD. How these figures are made

Newest ASIC/FPGA Design and Verification Engineer postings in United States

  1. ASIC/FPGA Design and Verification Engineer – Space Electronics – (Senior or Principal) - MTVBoeing · Mountain View, CA · $165K–$223K/yr · Posted Sep 27, 2026ApplyView posting
  2. ASIC/FPGA Design and Verification Engineer – Space Electronics – (Senior or Principal) - MTVBoeing · Mountain View, CA · $165K–$223K/yr · Posted Sep 27, 2026ApplyView posting
  3. ASIC/FPGA Design and Verification Engineer – Space Electronics – (Senior or Principal) - MTVBoeing · United States · $165K–$223K/yr · Posted Sep 26, 2026ApplyView posting
  4. ASIC/FPGA Design and Verification Engineer – Space Electronics – (Senior or Principal) - MTVBoeing · United States · $165K–$223K/yr · Posted Sep 26, 2026ApplyView posting
  5. ASIC/FPGA Design and Verification Engineer - (Lead, Senior, or Principal)Boeing · Albuquerque, NM · $137K–$185K/yr · Posted Aug 26, 2026ApplyView posting
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ASIC/FPGA Design and Verification Engineer pay in other places

  1. New Mexico$161K median · $161K–$161K typical · 4 postingsNew Mexico: middle half $161K–$161K, median $161K
  2. Albuquerque, NM$161K median · $161K–$161K typical · 4 postingsAlbuquerque, NM: middle half $161K–$161K, median $161K

All ASIC/FPGA Design and Verification Engineer salaries

Questions and answers

How much does a ASIC/FPGA Design and Verification Engineer make in United States?

The median posted base pay for ASIC/FPGA Design and Verification Engineer jobs in United States is $161K a year, from 9 job postings with pay at 1 company.

What is the typical ASIC/FPGA Design and Verification Engineer pay range in United States?

The middle half of postings list $161K–$194K. The top 10% list $194K a year or more, and the lowest 10% $161K or less.

How does United States pay compare with all ASIC/FPGA Design and Verification Engineer jobs?

The median here is $161K, against $161K across all 9 postings for the role.

How many ASIC/FPGA Design and Verification Engineer jobs in United States list pay?

9 open postings at 1 company list a pay range; figures use postings with at least 3 per group.

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