Engineering Intern - AI/ML ASIC CAD (Spring 2027 Co-Op)

Job description

Role Summary

Rivian internships are experiences optimized for student candidates. To be eligible, you must be an undergraduate or graduate student in an accredited program during the internship term with an expected graduation date between December 2027 and 2029. Rivian's Internship Program requires active student enrollment. Information regarding your expected degree completion date is collected solely to verify eligibility and determine your availability for future full-time opportunities. Rivian is an equal opportunity employer and does not use graduation dates to determine the age of applicants or as a basis for discriminatory hiring decisions.

If you are not pursuing a degree, please see our full time positions on our Rivian careers site. Note that if your university has specific requirements for internship programs, it is your responsibility to fulfill those requirements.

Our Spring Co-op program runs from Jan-Aug 2027. In order to be considered for this role, you must be available to work onsite, full time (40 hours per week), for the entire duration. If you're unable to work during the spring semester, please instead apply to our Summer Internship Program.

In this role, you will implement new or modify existing AI tools used in the ASIC PD flows to improve turn around time, ease of viewing data, improve overall efficiency in implementing RAP series of Rivian autonomous ASIC.

Responsibilities

• Build, develop and deploy software, automation and AI-assisted solutions that improve IC build work flows across physical build, data visualization, report summarization, checklist creation/reviews etc
• Develop and enhance AI -Enabled tools, Agents and workflow automation that improves engineering productivity and design team efficiency
• Collaborate with Physical Design partners like Logic Design/Packaging/Verification teams to identify and implement high impact opportunities for Automation, Generative AI and AI assisted design flow enablement.
• Build and Maintain the AI tool integration and write supporting technical/usage content for Physical Design team.

Qualifications

• Must be currently pursuing a masters, or PhD degree at an accredited university
• Actively pursuing a degree or one closely related in Computer or Electrical Engineering

• Experience working with Physical Data Structures, Algorithms (Python)
• Expreience with software CI/CD Processes
• Experience in Unix/Linux GenAI, AI/ML Techniques for automation
• Knowledge of ASIC CAD tools used in Synthesis/PnR

#LI-HH2

Pay Disclosure

The salary range for this role is $45.00-51.00 per hour for Palo Alto based applicants. This is the lowest to highest salary we in good faith believe we would pay for this role at the time of this posting. An employee’s position within the salary range will be based on several factors including, but not limited to, specific competencies, relevant education, qualifications, certifications, experience, skills, geographic location, shift, and organizational needs. We offer a comprehensive package of benefits including but not limited to paid vacation, paid sick leave, and medical insurance benefits. Internship positions are not eligible for retirement benefits. More information about benefits is available at rivianbenefits.com. You can apply for this role through careers.rivian.com (or through internal-careers-rivian.icims.com if you are a current employee). There is no fixed deadline for this application; applications are accepted on an ongoing basis until the role is filled or the opening is no longer needed.