SALARIES · 10 POSTED PAY RANGES
Cisco Systems, Inc. ASIC Design Verification Engineer salaries
Pay ranges Cisco Systems, Inc. published in 10 open job postings for ASIC Design Verification Engineer roles, updated Sep 30, 2026.
- Median base pay$185,900a year
- Typical range$185,900–$203,200Middle half of postings
- Top 10%$203,200and above
- Postings10with a pay range
Posted base pay ranges from job listings, not total compensation. Figures are in USD. How these figures are made
Cisco Systems, Inc.’s ASIC Design Verification Engineer titles
Pay by level
Locations
- United States · $186K median · 7 postings
- California · $186K median · 7 postings
- San Jose, CA · $186K median · 7 postings
Newest Cisco Systems, Inc. ASIC Design Verification Engineer postings
- ASIC Design Verification EngineerCisco Systems, Inc. · Remote · $153K–$219K/yr · Posted Aug 29, 2026ApplyView posting
- SR ASIC Design Verification EngineerCisco Systems, Inc. · $165K–$241K/yr · Posted Aug 26, 2026ApplyView posting
- ASIC Design Verification EngineerCisco Systems, Inc. · San Jose, CA · $153K–$219K/yr · Posted Aug 26, 2026ApplyView posting
- ASIC Design Verification EngineerCisco Systems, Inc. · San Jose, CA · $165K–$241K/yr · Posted Aug 26, 2026ApplyView posting
- ASIC Design Verification EngineerCisco Systems, Inc. · San Jose, CA · $153K–$219K/yr · Posted Aug 23, 2026ApplyView posting
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